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UA741
GENERAL PURPOSE SINGLE OPERATIONAL AMPLIFIER
s LARGE INPUT VOLTAGE RANGE s NO LATCH-UP s HIGH GAIN s SHORT-CIRCUIT PROTECTION s NO FREQUENCY COMPENSATION s REQUIRED s SAME PIN CONFIGURATION AS THE UA709
N DIP8 (Plastic Package)
DESCRIPTION The UA741 is a high performance monolithic operational amplifier constructed on a single silicon chip. It is intented for a wide range of analog applications.
D SO8 (Plastic Micropackage)
s Summing amplifier s Voltage follower s Integrator s Active filter s Function generator
The high gain and wide range of operating voltages provide superior performances in integrator, summing amplifier and general feedback applications. The internal compensation network (6dB/ octave) insures stability in closed loop circuits. PIN CONNECTIONS (top view)
Part Number Temperature Range N UA741C 0C, +70C UA741I -40C, +105C UA741M -55C, +125C Example : UA741CN * * * D * * *
ORDER CODE
Package
N = Dual in Line Package (DIP) D = Small Outline Package (SO) - also available in Tape & Reel (DT)
1 2 3 4
8 7 6 5
1 - Offset null 1 2 - Inverting input 3 - Non-inverting input 4 - VCC5 - Offset null 2 6 - Output 7 - VCC+ 8 - N.C.
November 2001
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UA741
SCHEMATIC DIAGRAM
Non-Inverting input Vcc+
Q8
Q9
Q12
Q13
Inverting input Q1 Q2 C1 30pF
R7 4.5k Q15
Q14
Q18
Q3
Q4
R5 39k
R8 7.5k
R9 25 Output R10 50
Q16 Q7 Q17 Q20
Q5
Q6
Q10 Offset null 1
Q11 Q22
R3 50k R1 1k R2 1k R4 5k
R12 50k R11 50 VccOffset null 2
ABSOLUTE MAXIMUM RATINGS
Symbol VCC Vid Vi Ptot Toper Tstg
1.
Parameter Supply voltage Differential Input Voltage Input Voltage Power Dissipation Output Short-circuit Duration Operating Free-air Temperature Range Storage Temperature Range
1)
UA741M
UA741I 22 30 15 500 Infinite
UA741C
Unit V V V mW
-55 to +125
-40 to +105 -65 to +150
0 to +70
C C
Power dissipation must be considered to ensure maximum junction temperature (Tj) is not exceeded.
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UA741
ELECTRICAL CHARACTERISTICS VCC = 15V, Tamb = +25C (unless otherwise specified)
Symbol Vio Parameter Input Offset Voltage (Rs 10k) Tamb = +25C Tmin Tamb Tmax Input Offset Current Tamb = +25C T min Tamb Tmax Input Bias Current Tamb = +25C Tmin Tamb Tmax Large Signal Voltage Gain (Vo = 10V, R L = 2k) Tamb = +25C Tmin Tamb Tmax Supply Voltage Rejection Ratio (Rs 10k) Tamb = +25C Tmin Tamb Tmax Supply Current, no load Tamb = +25C T min Tamb Tmax Input Common Mode Voltage Range Tamb = +25C Tmin Tamb Tmax Common Mode Rejection Ratio (RS 10k) Tamb = +25C Tmin Tamb Tmax Output short Circuit Current Output Voltage Swing Tamb = +25C Vopp Tmin Tamb Tmax RL RL RL RL = 10k = 2k = 10k = 2k 12 12 70 70 10 12 10 12 10 0.25 90 25 14 13 40 mA V Min. Typ. 1 Max. 5 6 nA 2 30 70 nA 10 100 200 V/mV 50 25 77 77 200 dB 90 mA 1.7 2.8 3.3 V Unit mV
Iio
Iib
Avd
SVR
ICC
Vicm
dB
CMR IOS
SR tr Kov Ri GBP THD en m
Slew Rate Vi = 10V, R L = 2k, CL = 100pF, unity Gain Rise Time Vi = 20mV, R L = 2k, CL = 100pF, unity Gain Overshoot Vi = 20mV, RL = 2k, CL = 100pF, unity Gain Input Resistance Gain Bandwith Product Vi = 10mV, R L = 2k, CL = 100pF, f =100kHz Total Harmonic Distortion f = 1kHz, Av = 20dB, R L = 2k, Vo = 2V pp, C L = 100pF,Tamb = +25C Equivalent Input Noise Voltage f = 1kHz, Rs = 100 Phase Margin
V/s 0.5 s 0.3 % 5 0.3 0.7 2 1 % 0.06 23 50 nV ----------Hz Degrees M MHz
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UA741
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC DIP
Millimeters Dim. Min. A a1 B b b1 D E e e3 e4 F i L Z 0.51 1.15 0.356 0.204 7.95 2.54 7.62 7.62 6.6 3.18 5.08 3.81 1.52 0.125 Typ. 3.32 1.65 0.55 0.304 10.92 9.75 0.020 0.045 0.014 0.008 0.313 Max. Min.
Inches Typ. 0.131 0.065 0.022 0.012 0.430 0.384 0.100 0.300 0.300 0260 0.200 0.150 0.060 Max.
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UA741
PACKAGE MECHANICAL DATA 8 PINS - PLASTIC MICROPACKAGE (SO)
L C a3 b1 c1
a2 b e3
A
s E
D M
8
5 F
1
4
Millimeters Dim. Min. A a1 a2 a3 b b1 C c1 D E e e3 F L M S 0.1 0.65 0.35 0.19 0.25 4.8 5.8 1.27 3.81 3.8 0.4 4.0 1.27 0.6 8 (max.) 0.150 0.016 Typ. Max. 1.75 0.25 1.65 0.85 0.48 0.25 0.5 45 (typ.) 5.0 6.2 0.189 0.228 Min. 0.004 0.026 0.014 0.007 0.010
a1
Inches Typ. Max. 0.069 0.010 0.065 0.033 0.019 0.010 0.020 0.197 0.244 0.050 0.150 0.157 0.050 0.024
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibil ity for the consequences of use of such information nor for any infring ement of patents or other righ ts of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change witho ut notice. This publ ication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life suppo rt devices or systems withou t express written approval of STMicroelectronics. (c) The ST logo is a registered trademark of STMicroelectronics (c) 2001 STMicroelectronics - Printed in Italy - All Rights Reserved STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia Malta - Morocco - Singapore - Spain - Sweden - Swit zerland - United Kingdom - United States (c) http://www. st.com
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